When data signals are communicated between circuit devices, reflection of the data signals occurs if the impedances of devices mismatch with each other. Thus, an information signal exchange system requires a terminal circuit for proving a terminal impedance and for terminating a signal transmission line, and the terminal circuit needs to have an impedance matching the impedance of the signal transmission line. The terminal circuit suppresses the reflection of a received signal to raise the integrity of the transferred signals. The terminal circuit may be used for multi-slew-rate off-chip drivers (OCDs) and on-die terminators (ODTs).
The terminal circuit may be located inside or outside of a semiconductor chip, which typically has integrated circuits for processing the data signals. The terminal circuit in a semiconductor chip is usually referred to as an on-chip terminator, on-die terminator, or active terminator.
FIG. 1 illustrates a conventional terminal circuit, which includes a plurality of resistors R′, each having a resistance that is also denoted as R′. The terminal circuit may be inside a chip. Each of the resistors R′ is serially connected to one switch. When a switch is closed, the respective resistor is connected in parallel to other resistors whose respective switches are also closed. Accordingly, the resistance of the terminal circuit may be adjusted by connecting a different number of resistors in parallel.
The resistance (impedance) of the terminal circuit is determined by the number of connected resistors. For example, if a number k of resistors are connected in parallel, the resistance of the resistor is R′/k. FIG. 2 illustrates the resistance of the terminal circuit as a function of number k. It is observed that the resistance of the terminal circuit is in a log scale, and the step heights (the differences in resistance values caused by connecting additional resistors) are not linear. With the increase in number k, the step heights become increasing smaller.
FIG. 2 also illustrates two lines representing the resistances of the terminal circuit in a slow-slow (SS) process corner and a fast-fast (FF) process corner. For each of the lines, the data with the highest resistance is obtained when only one resistor R′ is connected. From left to right, the number of connected resistors increases. At the SS corner, the resistance of the terminal circuit is higher than at the FF corner, and hence to achieve a pre-determined target resistance, more resistors have to be connected. Accordingly, when the target resistance is reached, with a great number of resistors being connected, the respective step heights may become too small. This requires the comparator (not shown) for determining the resistance of the terminal circuit to be very accurate. For example, in a 240-Ohm on-die terminal circuit, the comparator needs to have an accuracy of 5 mV. This is a very demanding requirement. If such an accuracy cannot be met, quantization errors may occur, and an additional circuit is further needed to handle the possible quantization errors.
At the FF corner, on the other hand, a smaller number of resistors need to be connected to achieve the target resistance. However, this means that the first couple of steps may be too high to meet the specification, and the respective steps cannot be used. FIG. 3 illustrates the resistances of a 240-Ohm on-die terminal circuit. It is shown that such a terminal circuit requires 15 steps. Unfortunately, the first step height (the difference between the first two resistances) is (283.08-257.34) Ohms, which is 25.7 Ohms. This step height exceeds 10 percent (24 Ohms) of the target resistance (240 Ohms), and cannot be used. Accordingly, the first step is wasted. In addition, the conventional terminal circuit occupies a relatively big chip area, partially due to the big number of required steps.